From 829c562035de130036a52a2a4e26f47530335941 Mon Sep 17 00:00:00 2001
From: Isaku Yamahata <yamahata@valinux.co.jp>
Date: Thu, 18 Sep 2008 17:54:15 +0900
Subject: [PATCH] [IA64] fix INIT injection.

xm trigger command sometimes causes an unexpected domain panic.
There are several symptoms:
 * Guest nested fault (INIT handler runs with vpsr.cpl != 0)
 * Interrupt when IC=0
 * Unexpected virtual <--> physical mode transition

Signed-off-by: Kouya Shimura <kouya@jp.fujitsu.com>
Signed-off-by: Kazuhiro Suzuki <kaz@jp.fujitsu.com>
---
 xen/arch/ia64/vmx/vlsapic.c         | 4 ++--
 xen/arch/ia64/vmx/vmx_phy_mode.c    | 7 ++++++-
 xen/include/asm-ia64/vmx_phy_mode.h | 2 ++
 3 files changed, 10 insertions(+), 3 deletions(-)

diff --git a/xen/arch/ia64/vmx/vlsapic.c b/xen/arch/ia64/vmx/vlsapic.c
index 124b4e892b..e0a063afbf 100644
--- a/xen/arch/ia64/vmx/vlsapic.c
+++ b/xen/arch/ia64/vmx/vlsapic.c
@@ -43,6 +43,7 @@
 #include <asm/vmx_platform.h>
 #include <asm/viosapic.h>
 #include <asm/vlsapic.h>
+#include <asm/vmx_phy_mode.h>
 #include <asm/linux/jiffies.h>
 #include <xen/domain.h>
 #include <asm/hvm/support.h>
@@ -614,9 +615,8 @@ struct vcpu *lid_to_vcpu(struct domain *d, uint16_t dest)
  * To inject INIT to guest, we must set the PAL_INIT entry 
  * and set psr to switch to physical mode
  */
-#define PAL_INIT_ENTRY 0x80000000ffffffa0
 #define PSR_SET_BITS (IA64_PSR_DT | IA64_PSR_IT | IA64_PSR_RT | \
-                      IA64_PSR_IC | IA64_PSR_RI)
+                      IA64_PSR_IC | IA64_PSR_RI | IA64_PSR_I | IA64_PSR_CPL)
 
 static void vmx_inject_guest_pal_init(VCPU *vcpu)
 {
diff --git a/xen/arch/ia64/vmx/vmx_phy_mode.c b/xen/arch/ia64/vmx/vmx_phy_mode.c
index 5d34771960..096c41bc20 100644
--- a/xen/arch/ia64/vmx/vmx_phy_mode.c
+++ b/xen/arch/ia64/vmx/vmx_phy_mode.c
@@ -255,7 +255,12 @@ void
 switch_mm_mode(VCPU *vcpu, IA64_PSR old_psr, IA64_PSR new_psr)
 {
     int act;
-    act = mm_switch_action(old_psr, new_psr);
+    /* Switch to physical mode when injecting PAL_INIT */
+    if (unlikely(MODE_IND(new_psr) == 0 &&
+                 vcpu_regs(vcpu)->cr_iip == PAL_INIT_ENTRY))
+        act = SW_2P_DT;
+    else
+        act = mm_switch_action(old_psr, new_psr);
     perfc_incra(vmx_switch_mm_mode, act);
     switch (act) {
     case SW_2P_DT:
diff --git a/xen/include/asm-ia64/vmx_phy_mode.h b/xen/include/asm-ia64/vmx_phy_mode.h
index a032fc7954..91ffbc74a5 100644
--- a/xen/include/asm-ia64/vmx_phy_mode.h
+++ b/xen/include/asm-ia64/vmx_phy_mode.h
@@ -96,4 +96,6 @@ extern void physical_tlb_miss(VCPU *vcpu, u64 vadr, int type);
 #define VMX_MMU_PHY_D      1    /* Half physical: it=1,dt=0  */
 #define VMX_MMU_PHY_DT     3    /* Full physical mode: it=0,dt=0  */
 
+#define PAL_INIT_ENTRY 0x80000000ffffffa0
+
 #endif /* _PHY_MODE_H_ */
-- 
2.30.2